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mpy-cross: Add RISC-V RV32IMC support in MPY files.

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MPY files can now hold generated RV32IMC native code.  This can be
accomplished by passing the `-march=rv32imc` flag to mpy-cross.

Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
This commit is contained in:
Alessandro Gatti 2024-06-16 20:40:28 +02:00 committed by Damien George
parent 8338f66352
commit 99f5659cf5
6 changed files with 16 additions and 4 deletions
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2
docs/reference/mpyfiles.rst
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@ -58,7 +58,7 @@ If importing an .mpy file fails then try the following:
sys_mpy = sys.implementation._mpy sys_mpy = sys.implementation._mpy
arch = [None, 'x86', 'x64', arch = [None, 'x86', 'x64',
'armv6', 'armv6m', 'armv7m', 'armv7em', 'armv7emsp', 'armv7emdp', 'armv6', 'armv6m', 'armv7m', 'armv7em', 'armv7emsp', 'armv7emdp',
'xtensa', 'xtensawin'][sys_mpy >> 10] 'xtensa', 'xtensawin', 'rv32imc'][sys_mpy >> 10]
print('mpy version:', sys_mpy & 0xff) print('mpy version:', sys_mpy & 0xff)
print('mpy sub-version:', sys_mpy >> 8 & 3) print('mpy sub-version:', sys_mpy >> 8 & 3)
print('mpy flags:', end='') print('mpy flags:', end='')

6
mpy-cross/main.c
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@ -129,7 +129,8 @@ static int usage(char **argv) {
"\n" "\n"
"Target specific options:\n" "Target specific options:\n"
"-msmall-int-bits=number : set the maximum bits used to encode a small-int\n" "-msmall-int-bits=number : set the maximum bits used to encode a small-int\n"
"-march=<arch> : set architecture for native emitter; x86, x64, armv6, armv6m, armv7m, armv7em, armv7emsp, armv7emdp, xtensa, xtensawin\n" "-march=<arch> : set architecture for native emitter;\n"
" x86, x64, armv6, armv6m, armv7m, armv7em, armv7emsp, armv7emdp, xtensa, xtensawin, rv32imc\n"
"\n" "\n"
"Implementation specific options:\n", argv[0] "Implementation specific options:\n", argv[0]
); );
@ -312,6 +313,9 @@ MP_NOINLINE int main_(int argc, char **argv) {
} else if (strcmp(arch, "xtensawin") == 0) { } else if (strcmp(arch, "xtensawin") == 0) {
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_XTENSAWIN; mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_XTENSAWIN;
mp_dynamic_compiler.nlr_buf_num_regs = MICROPY_NLR_NUM_REGS_XTENSAWIN; mp_dynamic_compiler.nlr_buf_num_regs = MICROPY_NLR_NUM_REGS_XTENSAWIN;
} else if (strcmp(arch, "rv32imc") == 0) {
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_RV32IMC;
mp_dynamic_compiler.nlr_buf_num_regs = MICROPY_NLR_NUM_REGS_RV32I;
} else if (strcmp(arch, "host") == 0) { } else if (strcmp(arch, "host") == 0) {
#if defined(__i386__) || defined(_M_IX86) #if defined(__i386__) || defined(_M_IX86)
mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_X86; mp_dynamic_compiler.native_arch = MP_NATIVE_ARCH_X86;

1
mpy-cross/mpconfigport.h
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@ -46,6 +46,7 @@
#define MICROPY_EMIT_XTENSA (1) #define MICROPY_EMIT_XTENSA (1)
#define MICROPY_EMIT_INLINE_XTENSA (1) #define MICROPY_EMIT_INLINE_XTENSA (1)
#define MICROPY_EMIT_XTENSAWIN (1) #define MICROPY_EMIT_XTENSAWIN (1)
#define MICROPY_EMIT_RV32 (1)
#define MICROPY_DYNAMIC_COMPILER (1) #define MICROPY_DYNAMIC_COMPILER (1)
#define MICROPY_COMP_CONST_FOLDING (1) #define MICROPY_COMP_CONST_FOLDING (1)

1
mpy-cross/mpy_cross/__init__.py
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@ -43,6 +43,7 @@ NATIVE_ARCHS = {
"NATIVE_ARCH_ARMV7EMDP": "armv7emdp", "NATIVE_ARCH_ARMV7EMDP": "armv7emdp",
"NATIVE_ARCH_XTENSA": "xtensa", "NATIVE_ARCH_XTENSA": "xtensa",
"NATIVE_ARCH_XTENSAWIN": "xtensawin", "NATIVE_ARCH_XTENSAWIN": "xtensawin",
"NATIVE_ARCH_RV32IMC": "rv32imc",
} }
globals().update(NATIVE_ARCHS) globals().update(NATIVE_ARCHS)

3
py/persistentcode.h
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@ -71,6 +71,8 @@
#define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_XTENSA) #define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_XTENSA)
#elif MICROPY_EMIT_XTENSAWIN #elif MICROPY_EMIT_XTENSAWIN
#define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_XTENSAWIN) #define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_XTENSAWIN)
#elif MICROPY_EMIT_RV32
#define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_RV32IMC)
#else #else
#define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_NONE) #define MPY_FEATURE_ARCH (MP_NATIVE_ARCH_NONE)
#endif #endif
@ -95,6 +97,7 @@ enum {
MP_NATIVE_ARCH_ARMV7EMDP, MP_NATIVE_ARCH_ARMV7EMDP,
MP_NATIVE_ARCH_XTENSA, MP_NATIVE_ARCH_XTENSA,
MP_NATIVE_ARCH_XTENSAWIN, MP_NATIVE_ARCH_XTENSAWIN,
MP_NATIVE_ARCH_RV32IMC,
}; };
enum { enum {

7
tools/mpy-tool.py
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@ -113,6 +113,7 @@ MP_NATIVE_ARCH_ARMV7EMSP = 7
MP_NATIVE_ARCH_ARMV7EMDP = 8 MP_NATIVE_ARCH_ARMV7EMDP = 8
MP_NATIVE_ARCH_XTENSA = 9 MP_NATIVE_ARCH_XTENSA = 9
MP_NATIVE_ARCH_XTENSAWIN = 10 MP_NATIVE_ARCH_XTENSAWIN = 10
MP_NATIVE_ARCH_RV32IMC = 11
MP_PERSISTENT_OBJ_FUN_TABLE = 0 MP_PERSISTENT_OBJ_FUN_TABLE = 0
MP_PERSISTENT_OBJ_NONE = 1 MP_PERSISTENT_OBJ_NONE = 1
@ -1094,8 +1095,10 @@ class RawCodeNative(RawCode):
): ):
# ARMV6 or Xtensa -- four byte align. # ARMV6 or Xtensa -- four byte align.
self.fun_data_attributes += " __attribute__ ((aligned (4)))" self.fun_data_attributes += " __attribute__ ((aligned (4)))"
elif MP_NATIVE_ARCH_ARMV6M <= config.native_arch <= MP_NATIVE_ARCH_ARMV7EMDP: elif (
# ARMVxxM -- two byte align. MP_NATIVE_ARCH_ARMV6M <= config.native_arch <= MP_NATIVE_ARCH_ARMV7EMDP
) or config.native_arch == MP_NATIVE_ARCH_RV32IMC:
# ARMVxxM or RV32IMC -- two byte align.
self.fun_data_attributes += " __attribute__ ((aligned (2)))" self.fun_data_attributes += " __attribute__ ((aligned (2)))"
def disassemble(self): def disassemble(self):