Paul Sokolovsky 0dbd928cee Makefiles: Remove duplicate object files when linking.
Scenario: module1 depends on some common file from lib/, so specifies it
in its SRC_MOD, and the same situation with module2, then common file
from lib/ eventually ends up listed twice in $(OBJ), which leads to link
errors.

Make is equipped to deal with such situation easily, quoting the manual:
"The value of $^ omits duplicate prerequisites, while $+ retains them and
preserves their order." So, just use $^ consistently in all link targets.
2015-10-24 15:46:53 +03:00
..
2014-03-11 23:55:41 -07:00
2014-05-02 23:03:23 +01:00
2015-03-29 22:12:14 +01:00
2014-03-12 18:15:55 -07:00
2015-08-05 23:38:24 +01:00
2014-06-15 00:41:47 +01:00