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fengqi/lv_micropython
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lv_micropython/ports
History
stijn 397ee7c00e windows/msvc: Fix incorrect indentation in dirent.c.
2018-10-05 17:14:33 +10:00
..
bare-arm
py/objstr: Make % (__mod__) formatting operator configurable.
2018-09-20 14:41:08 +10:00
cc3200
cc3200/mods: Access dict map directly instead of using helper func.
2018-07-08 22:08:24 +10:00
esp32
esp32/machine_rtc: Fix locals dict entry, init qstr points to init meth.
2018-09-20 17:52:16 +10:00
esp8266
esp8266: Remove scanning of GC pointers in native code block.
2018-09-27 23:46:09 +10:00
minimal
py/objstr: Make % (__mod__) formatting operator configurable.
2018-09-20 14:41:08 +10:00
nrf
nrf/uart: Fix UART.writechar() to write just 1 byte.
2018-08-02 22:21:24 +02:00
pic16bit
all: Update Makefiles and others to build with new ports/ dir layout.
2017-09-06 14:09:13 +10:00
qemu-arm
qemu-arm/test_main: Include setjmp.h because it's used by gc_collect.
2017-12-20 15:42:06 +11:00
stm32
stm32/mpconfigport.h: Enable math.factorial, optimised version.
2018-09-26 15:05:19 +10:00
teensy
stm32/pin: In pin AF object, remove union of periph ptr types.
2018-04-11 16:14:58 +10:00
unix
unix/moduselect: Raise OSError(ENOENT) if obj to modify is not in poller
2018-10-05 16:56:43 +10:00
windows
windows/msvc: Fix incorrect indentation in dirent.c.
2018-10-05 17:14:33 +10:00
zephyr
zephyr/CMakeLists: Update for latest Zephyr CMake usage refactorings.
2018-09-14 13:21:13 +10:00
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