82e69df33e
This is a workaround for a bug in ESP-IDF where the configuration setting for maximum active TCP sockets (PCBs) is not applied. Fixes cases where a lot of short-lived TCP connections can cause: - Excessive memory usage (unbounded number of sockets in TIME-WAIT). - Much higher risk of stalled connections due to repeated port numbers. The maximum number of active TCP PCBs is reduced from 16 to 12 to further reduce this risk (trade-off against possibility of TIME-WAIT Assassination as described in RFC1337). This is not a watertight fix for the second point: a peer can still reuse a port number while a previous socket is in TIME-WAIT, and LWIP will reject that connection (in an RFC compliant way) causing the peer to stall. This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton <angus@redyak.com.au>
140 lines
4.3 KiB
Plaintext
140 lines
4.3 KiB
Plaintext
# MicroPython on ESP32, ESP IDF configuration
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# The following options override the defaults
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CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
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# Compiler options: use -O2 and disable assertions to improve performance
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CONFIG_COMPILER_OPTIMIZATION_PERF=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
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# Application manager
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CONFIG_APP_EXCLUDE_PROJECT_VER_VAR=y
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CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR=y
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# Bootloader config
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CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y
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CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
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CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y
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# Change default log level to "ERROR" (instead of "INFO")
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CONFIG_LOG_DEFAULT_LEVEL_ERROR=y
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# Set the maximum included log level higher than the default,
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# so esp.osdebug() can enable more logging at runtime.
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#
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# To increase the max log verbosity to Debug or Verbose instead, comment
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# CONFIG_LOG_MAXIMUM_LEVEL_INFO=y and uncomment one of the other settings.
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#
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# If not needed, the next line can be commented entirely to save binary size.
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CONFIG_LOG_MAXIMUM_LEVEL_INFO=y
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#CONFIG_LOG_MAXIMUM_LEVEL_DEBUG=y
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#CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE=y
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# Main XTAL Config
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# Only on: ESP32
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CONFIG_XTAL_FREQ_AUTO=y
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# ESP System Settings
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# Only on: ESP32, ESP32S3
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=n
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CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=n
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# Power Management
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CONFIG_PM_ENABLE=y
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# Memory protection
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# This is required to allow allocating IRAM
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CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=n
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# FreeRTOS
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CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=2
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CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
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CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP=y
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# UDP
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CONFIG_LWIP_PPP_SUPPORT=y
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CONFIG_LWIP_PPP_PAP_SUPPORT=y
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CONFIG_LWIP_PPP_CHAP_SUPPORT=y
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# SSL
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# Use 4kiB output buffer instead of default 16kiB
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CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
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CONFIG_MBEDTLS_HAVE_TIME_DATE=y
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CONFIG_MBEDTLS_PLATFORM_TIME_ALT=y
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CONFIG_MBEDTLS_HAVE_TIME=y
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# Disable ALPN support as it's not implemented in MicroPython
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CONFIG_MBEDTLS_SSL_ALPN=n
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# Disable slow or unused EC curves
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CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=n
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CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=n
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CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=n
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CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=n
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# Disable certificate bundle as it's not implemented in MicroPython
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CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=n
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CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=n
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# Allow mbedTLS to allocate from PSRAM or internal memory
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#
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# (The ESP-IDF default is internal-only, partly for physical security to prevent
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# possible information leakage from unencrypted PSRAM contents on the original
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# ESP32 - no PSRAM encryption on that chip. MicroPython doesn't support flash
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# encryption and is already storing the Python heap in PSRAM so this isn't a
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# significant factor in overall physical security.)
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CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC=y
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# ULP coprocessor support
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# Only on: ESP32, ESP32S2, ESP32S3
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CONFIG_ULP_COPROC_ENABLED=y
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CONFIG_ULP_COPROC_TYPE_FSM=y
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CONFIG_ULP_COPROC_RESERVE_MEM=2040
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# For cmake build
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CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
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CONFIG_PARTITION_TABLE_CUSTOM=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions-4MiB.csv"
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# To reduce iRAM usage
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CONFIG_ESP32_WIFI_IRAM_OPT=n
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CONFIG_ESP32_WIFI_RX_IRAM_OPT=n
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CONFIG_SPI_MASTER_ISR_IN_IRAM=n
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CONFIG_SPI_SLAVE_ISR_IN_IRAM=n
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CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=n
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CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=n
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# Legacy ADC Calibration Configuration
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# Only on: ESP32
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CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y
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CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y
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CONFIG_ADC_CAL_LUT_ENABLE=y
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# UART Configuration
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CONFIG_UART_ISR_IN_IRAM=y
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# IDF 5 deprecated
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CONFIG_ADC_SUPPRESS_DEPRECATE_WARN=y
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CONFIG_RMT_SUPPRESS_DEPRECATE_WARN=y
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CONFIG_ETH_USE_SPI_ETHERNET=y
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CONFIG_ETH_SPI_ETHERNET_W5500=y
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CONFIG_ETH_SPI_ETHERNET_KSZ8851SNL=y
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CONFIG_ETH_SPI_ETHERNET_DM9051=y
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# Using newlib "nano" formatting saves size on SoCs where "nano" formatting
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# functions are in ROM. Note some newer chips (c2,c6) have "full" newlib
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# formatting in ROM instead and should override this, check
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# ESP_ROM_HAS_NEWLIB_NANO_FORMAT.
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CONFIG_NEWLIB_NANO_FORMAT=y
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# IRAM/DRAM split protection is a memory protection feature on some parts
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# that support SOC_CPU_IDRAM_SPLIT_USING_PMP, eg. C2, C5, C6, H2
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# Due to limitations in the PMP system this feature breaks native emitters
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# so is disabled by default.
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CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=n
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# Further limit total sockets in TIME-WAIT when there are many short-lived
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# connections.
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CONFIG_LWIP_MAX_ACTIVE_TCP=12
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