Add native gchelper support for 32 bits RISC-V RV32I targets. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
53 lines
2.0 KiB
ArmAsm
53 lines
2.0 KiB
ArmAsm
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024 Alessandro Gatti
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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.global gc_helper_get_regs_and_sp
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.type gc_helper_get_regs_and_sp, @function
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gc_helper_get_regs_and_sp:
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/* Store registers into the given array. */
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sw x8, 0(x10) /* Save S0. */
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sw x9, 4(x10) /* Save S1. */
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sw x18, 8(x10) /* Save S2. */
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sw x19, 12(x10) /* Save S3. */
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sw x20, 16(x10) /* Save S4. */
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sw x21, 20(x10) /* Save S5. */
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sw x22, 24(x10) /* Save S6. */
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sw x23, 28(x10) /* Save S7. */
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sw x24, 32(x10) /* Save S8. */
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sw x25, 36(x10) /* Save S9. */
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sw x26, 40(x10) /* Save S10. */
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sw x27, 44(x10) /* Save S11. */
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/* Return the stack pointer. */
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add x10, x0, x2
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jalr x0, x1, 0
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.size gc_helper_get_regs_and_sp, .-gc_helper_get_regs_and_sp
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