9bfb4cec6e
All of these files are first-party code written from scratch as part of
this repository, and were added when the top-level MIT license was active,
so they have an MIT license by default. Tracing back the git history show
the original authors/source/copyright as follows:
- main.c, mpconfigport.h: copied from the bare-arm port [1].
- test_main.c: added in [2].
- mphalport.h: added in [3] then updated in [4].
- mps2.ld, nrf51.ld, stm32.ld, uart.h: added in [4].
- imx6.ld, uart.c, startup.c: added in [4] and updated in [5].
[1] Commit c55721582282f282d33e35e458a2944890210ebc in 2014, the initial
bare-arm port; see related ee857853d60a135685c5088e5492dfe6e8a5acb0.
[2] Commit c1c32d65af038ba1b2a2a8dd69e3f7e63eac5f3e in 2014, initial
qemu-arm CI tests.
[3] Commit b0a15aa73540f82ef47c9492af7ce196d1b1a6e9 in 2016, enabling
extmods and their tests.
[4] Commit e7332b05841549a41614e522285639dcaa7bd526 in 2018, big refactor.
[5] Commit b84406f3133a36a703a1506d754fc046dd955922 in 2021, adding
Cortex-A9 support.
Signed-off-by: Damien George <damien@micropython.org>
45 lines
769 B
Plaintext
45 lines
769 B
Plaintext
/* This file is part of the MicroPython project, http://micropython.org/
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* The MIT License (MIT)
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* Copyright (c) 2018 Damien P. George
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*/
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MEMORY
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{
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ROM : ORIGIN = 0x00000000, LENGTH = 1M
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RAM : ORIGIN = 0x20000000, LENGTH = 256K
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}
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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SECTIONS
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{
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.text : {
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. = ALIGN(4);
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KEEP(*(.isr_vector))
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*(.text*)
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*(.rodata*)
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. = ALIGN(4);
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_etext = .;
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_sidata = _etext;
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} > ROM
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.data : AT ( _sidata )
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{
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. = ALIGN(4);
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_sdata = .;
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*(.data*)
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. = ALIGN(4);
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_edata = .;
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} >RAM
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.bss :
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{
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. = ALIGN(4);
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_sbss = .;
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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} >RAM
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}
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