c0b64a3f23
Minor change to remove support for using numeric IDs for machine.Pin. This was previously based on the index of the pin in the board csv, but this is different (and incompatible) with other ports. This work was funded through GitHub Sponsors. Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
223 lines
10 KiB
Python
223 lines
10 KiB
Python
#!/usr/bin/env python
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from collections import defaultdict
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import os
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import re
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import sys
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sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
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import boardgen
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IOMUX_REGEXS = [
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r"IOMUXC_(?P<pin>GPIO_SD_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_AD_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_EMC_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_AD_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_SD_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_EMC_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_DISP_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_LPSR_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_[SNVS_]*(?P<pin>WAKEUP[_DIG]*)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_[SNVS_]*(?P<pin>PMIC_ON_REQ[_DIG]*)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_[SNVS_]*(?P<pin>PMIC_STBY_REQ[_DIG]*)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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r"IOMUXC_(?P<pin>GPIO_SNVS_\d\d_DIG)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
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]
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SUPPORTED_AF_FNS = {"GPIO", "USDHC", "FLEXPWM", "TMR"}
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class MimxrtPin(boardgen.Pin):
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def __init__(self, cpu_pin_name):
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super().__init__(cpu_pin_name)
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self._afs = []
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self._adc_fns = []
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# Called for each AF defined in the csv file for this pin.
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def add_af(self, af_idx, af_name, af):
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# mimxrt-specific: Any pin in the af.csv is implicitly part of the board
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# pins.csv and will therefore be in the Pin.cpu dict. This is
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# equivalent to adding `,CPUNAME` to the board.csv for every pin in the
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# af.csv.
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self._available = True
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if af_name == "ALT5":
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m = re.match("GPIO([0-9]+)_IO([0-9]+)", af)
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self._port = int(m.group(1))
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self._pin = int(m.group(2))
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if af_name.startswith("ALT"):
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instance = af.split("_")[0]
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fn = re.match("^([A-Z][A-Z0-9]+[A-Z])[0-9]*$", instance).group(1)
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if fn not in SUPPORTED_AF_FNS:
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return
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iomux_config = self._generator._iomux_pin_config[self.name()]
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input_reg = iomux_config[af_idx]["inputRegister"].strip("U")
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input_daisy = int(iomux_config[af_idx]["inputDaisy"].strip("U"), 16)
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self._afs.append((af_idx, input_reg, input_daisy, instance, fn, af))
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elif af_name == "ADC":
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adc_regex = r"ADC(?P<instance>\d*)_IN(?P<channel>\d*)"
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lpadc_regex = r"ADC(?P<instance>\d*)_CH(?P<channel>\d*)" # LPADC for MIMXRT11xx chips
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matches = re.finditer(adc_regex, af, re.MULTILINE)
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for match in matches:
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self._adc_fns.append(
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(int(match.group("instance")), int(match.group("channel")), "ADC")
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)
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matches = re.finditer(lpadc_regex, af, re.MULTILINE)
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for match in matches:
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self._adc_fns.append(
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(int(match.group("instance")), int(match.group("channel")), "LPADC")
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)
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# Use the PIN() macro defined in samd_prefix.c for defining the pin
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# objects.
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def definition(self):
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if "_LPSR_" in self.name():
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macro = "PIN_LPSR"
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elif (
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"_SNVS_" in self.name()
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or self.name().startswith("PMIC_")
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or self.name().startswith("WAKEUP")
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):
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macro = "PIN_SNVS"
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else:
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macro = "PIN"
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# PIN(_name, _gpio, _pin, _af_list, _adc_list_len, _adc_list)
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return "{:s}({:s}, GPIO{:d}, {:d}, pin_{:s}_af, {:d}, {:s})".format(
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macro,
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self.name(),
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self._port,
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self._pin,
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self.name(),
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len(self._adc_fns),
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"pin_{:s}_adc".format(self.name()) if self._adc_fns else "NULL",
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)
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# This will be called at the start of the output (after the prefix) for
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# each pin. Use it to emit the af and adc objects.
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def print_source(self, out_source):
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print(
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"static const machine_pin_af_obj_t pin_{:s}_af[] = {{".format(self.name()),
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file=out_source,
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)
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for af_idx, input_reg, input_daisy, instance, _fn, af in self._afs:
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print(
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" PIN_AF({:s}, PIN_AF_MODE_ALT{:d}, {:d}, {:s}, {:s}, {:s}),".format(
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af, af_idx, input_daisy, instance, input_reg, "0x10B0U"
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),
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file=out_source,
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)
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print("};", file=out_source)
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print(file=out_source)
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if self._adc_fns:
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print(
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"static const machine_pin_adc_obj_t pin_{:s}_adc[] = {{".format(self.name()),
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file=out_source,
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)
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for instance, channel, peripheral in self._adc_fns:
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print(
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" PIN_ADC({:s}{:d}, {:d}),".format(peripheral, instance, channel),
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file=out_source,
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)
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print("};", file=out_source)
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# mimxrt cpu names must be "GPIO_<funcs>_<num>", with zero-prefixed two-digit <num>.
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@staticmethod
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def validate_cpu_pin_name(cpu_pin_name):
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boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
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if not re.match(
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"^((GPIO_((SNVS|EMC|LPSR|DISP)_)?([AS]D_)?(B[012]_)?[0-9][0-9])|WAKEUP|PMIC_(ON|STBY)_REQ)(_DIG)?$",
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cpu_pin_name,
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):
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raise boardgen.PinGeneratorError("Invalid cpu pin name '{}'".format(cpu_pin_name))
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class MimxrtPinGenerator(boardgen.PinGenerator):
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def __init__(self):
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# Use custom pin type above, and also enable the --af-csv argument so
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# that add_af gets called on each pin.
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super().__init__(
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pin_type=MimxrtPin,
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enable_af=True,
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)
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self._iomux_pin_config = {}
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# Load the iomux configuration from fsl_iomuxc.h.
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def load_iomux_header(self, iomux_filename):
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with open(iomux_filename, "r") as ipt:
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input_str = ipt.read()
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for regex in IOMUX_REGEXS:
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matches = re.finditer(regex, input_str, re.MULTILINE)
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for match in matches:
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if match.group("pin") not in self._iomux_pin_config:
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self._iomux_pin_config[match.group("pin")] = {
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int((match.groupdict()["muxMode"].strip("U")), 16): match.groupdict()
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}
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else:
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self._iomux_pin_config[match.group("pin")][
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int((match.groupdict()["muxMode"].strip("U")), 16)
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] = match.groupdict()
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# Also load the iomux header.
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def load_inputs(self, out_source):
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if self.args.iomux_header:
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print("// --iomux-header {:s}".format(self.args.iomux_header), file=out_source)
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self.load_iomux_header(self.args.iomux_header)
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super().load_inputs(out_source)
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# Provide a macro for each supported (pin,af) that can be used to
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# initialise a struct containing a machine_pin_obj_t* and the
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# corresponding af for that pin. e.g. A mimxrt_sdcard_pin_t instance can
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# be initialised with GPIO_SD_B0_00_USDHC1_CMD which tells it how to get
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# the CMD pin of the USDHC1 function on the GPIO_SD_B0_00 pin.
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def print_module_instances(self, out_header):
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print(file=out_header)
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for match_fn in ("USDHC", "FLEXPWM", "TMR"):
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module_instances = defaultdict(list)
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for pin in self.available_pins():
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for i, (_af_idx, _input_reg, _input_daisy, instance, fn, af) in enumerate(
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pin._afs
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):
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if fn == match_fn:
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module_instances[instance].append(
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"#define {:s}_{:s} pin_{:s}, {:d}".format(
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pin.name(), af, pin.name(), i
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)
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)
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for k, v in module_instances.items():
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print("// {:s}".format(k), file=out_header)
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print("#define {:s}_AVAIL (1)".format(k), file=out_header)
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if match_fn == "FLEXPWM":
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print("#define {:s} {:s}".format(k, k[-4:]), file=out_header)
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for i in v:
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print(i, file=out_header)
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# Override to also print the module instances.
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def print_header(self, out_header):
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super().print_header(out_header)
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self.print_module_instances(out_header)
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# Override the default implementation just to change the default arguments
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# (extra header row, skip first column).
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def parse_af_csv(self, filename):
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return super().parse_af_csv(filename, header_rows=1, pin_col=0, af_col=1)
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# We need to know the mcu to emit the correct AF list.
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def extra_args(self, parser):
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parser.add_argument("--iomux-header")
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if __name__ == "__main__":
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MimxrtPinGenerator().main()
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