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fengqi/lv_micropython
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lv_micropython/ports
History
Daniel Shaulov cac2eddc16 minimal/main: Allow to compile without GC enabled.
2018-05-21 13:13:21 +10:00
..
bare-arm
ports/{bare-arm,minimal}/Makefile: Only build with core source files.
2018-02-22 12:48:51 +11:00
cc3200
py/stream: Switch stream close operation from method to ioctl.
2018-04-10 13:41:32 +10:00
esp32
esp32/Makefile: Update to latest ESP IDF version.
2018-05-21 11:28:36 +10:00
esp8266
esp8266: Change UART(0) to attach to REPL via uos.dupterm interface.
2018-05-21 11:31:59 +10:00
minimal
minimal/main: Allow to compile without GC enabled.
2018-05-21 13:13:21 +10:00
pic16bit
all: Update Makefiles and others to build with new ports/ dir layout.
2017-09-06 14:09:13 +10:00
qemu-arm
qemu-arm/test_main: Include setjmp.h because it's used by gc_collect.
2017-12-20 15:42:06 +11:00
stm32
stm32/boards: Add config files for new board, STM32L496GDISC.
2018-05-18 22:39:49 +10:00
teensy
stm32/pin: In pin AF object, remove union of periph ptr types.
2018-04-11 16:14:58 +10:00
unix
py/stream: Switch stream close operation from method to ioctl.
2018-04-10 13:41:32 +10:00
windows
ports: Enable ucollections.deque on relevant ports.
2018-02-21 22:55:13 +11:00
zephyr
zephyr/Makefile: Add kobj_types_h_target to Z_EXPORTS.
2018-05-21 10:35:16 +10:00
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